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Implementation of Energy Efficient Approximate Multiplier using 4 2 Compressor for Images
Author Name

K. Poornima, P. Lakshmi dharshini, M. Sabari, P. Tamilarasan, and R. Abinaya

Abstract

Approximate computing is tentatively applied in some digital signal processing applications which have an inherent tolerance for erroneous computing results. The approximate arithmetic blocks are utilized in them to improve the electrical performance of these circuits. Multiplier is one of the fundamental units in computer arithmetic blocks. Moreover, the 4-2 compressors are widely employed in the parallel multipliers to accelerate the compression process of partial products. Meanwhile, an error- correcting module (ECM) is presented to promote the error performance of approximate multiplier with the proposed 4-2 compressors. The number of the approximate 4-2 compressor’s outputs is innovatively reduced to one, which brings further improvements in the energy and area efficiency.



Published On :
2023-05-06

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