International Research Journal of Education and Technology

The wide spread of handy electronic devices and the advances in VLSItechnology have enabled the implementation of complex digital circuits in asingle chip. Digital circuits consist of several interconnected logic gateswhich together perform logical operations with many input signals. In recentyears, in deep submicron and low-power VLSI design, power dissipation, andarea havebecomecriticalparameters.

Themaincauseofpowerdissipationisduetothe charginganddischarging ofinternalnodecapacitanceduring transitionactivity.Powerdissipation is the most critical parameter in handheld and mobile devices. It isclassified into two types namely static or leakage power dissipation and activeor dynamic power dissipation. Static power dissipation is caused by leakagecurrent and other static components. Dynamic power dissipation is caused bythe charginganddischargingofinter-nodecapacitance.

Inatypicalchip10%ofpowerisconsumedbystaticpowerdissipation and 90% of power is consumed by dynamic power dissipation. Asstatic power dissipated in nanowatts, only dynamic power dissipation isconsidered here. The research analyzes an efficient method to transmit huge data through interconnect with reduced transition activity,area,and powerdissipation.